Github Repositories Trend

syntacore/scr1

SCR1 is an open-source RISC-V compatible MCU core
Total stars
278
Stars per day
0
Created at
2 years ago
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sifive/freedom-e-sdk

Open Source Software for Developing on the Freedom E Platform
Total stars
300
Language
C
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pulp-platform/pulpino

An open-source microcontroller system based on RISC-V
Homepage
http://www.pulp-platform.org
Total stars
576
Language
C
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Xilinx/CHaiDNN

HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs
Total stars
228
Language
C++
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YosysHQ/nextpnr

nextpnr portable FPGA place and route tool
Total stars
435
Language
C++
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riscv/riscv-gnu-toolchain

GNU toolchain for RISC-V, including GCC
Total stars
526
Language
C
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nasa/osal

Operating System Abstraction Layer
Total stars
208
Language
C
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ucb-bar/fpga-zynq

Support for Rocket Chip on Zynq FPGAs
Homepage
http://bar.eecs.berkeley.edu/projects/2014-rocket_chip.html
Total stars
253
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revng/revamb

The rev.ng main component: the static binary translator
Homepage
https://rev.ng/revamb
Total stars
248
Language
C++
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cliffordwolf/riscv-formal

RISC-V Formal Verification Framework
Total stars
260
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bitcraze/crazyflie-firmware

The main firmware for the Crazyflie Nano Quadcopter.
Total stars
588
Language
C
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