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ucb-bar/rocket-chip

Rocket Chip Generator
Total stars
1,193
Stars per day
1
Created at
5 years ago
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ucb-bar/riscv-sodor

educational microarchitectures for risc-v isa
Total stars
294
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ridecore/ridecore

RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.
Total stars
169
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pulp-platform/pulpino

An open-source microcontroller system based on RISC-V
Homepage
http://www.pulp-platform.org
Total stars
552
Language
C
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ucb-bar/fpga-zynq

Support for Rocket Chip on Zynq FPGAs
Homepage
http://bar.eecs.berkeley.edu/projects/2014-rocket_chip.html
Total stars
231
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sergeykhbr/riscv_vhdl

VHDL implementation of the RISC-V System-on-Chip based on bare "Rocket Chip".
Homepage
http://sergeykhbr.github.io/riscv_vhdl/
Total stars
242
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ucb-bar/riscv-boom

Berkeley Out-of-Order Machine
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504
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cliffordwolf/picorv32

PicoRV32 - A Size-Optimized RISC-V CPU
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Xilinx/CHaiDNN

HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs
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ucb-bar/chisel3

Chisel 3
Homepage
https://chisel.eecs.berkeley.edu/
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syntacore/scr1

SCR1 is an open-source RISC-V compatible MCU core
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